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    SubjectRe: [RFC 1/2] dt-bindings: clk: versaclock5: Add load capacitance properties
    On Wed, Jan 06, 2021 at 11:38:59AM -0600, Adam Ford wrote:
    > There are two registers which can set the load capacitance for
    > XTAL1 and XTAL2. These are optional registers when using an
    > external crystal. Update the bindings to support them.
    >
    > Signed-off-by: Adam Ford <aford173@gmail.com>
    > ---
    > .../devicetree/bindings/clock/idt,versaclock5.yaml | 12 ++++++++++++
    > 1 file changed, 12 insertions(+)
    >
    > diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
    > index 2ac1131fd922..e5e55ffb266e 100644
    > --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
    > +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml
    > @@ -59,6 +59,18 @@ properties:
    > minItems: 1
    > maxItems: 2
    >
    > + idt,xtal1-load-femtofarads:
    > + $ref: /schemas/types.yaml#/definitions/uint32

    Already has a type, so you can drop the $ref.

    > + minimum: 9000
    > + maximum: 25000
    > + description: Optional loading capacitor for XTAL1
    > +
    > + idt,xtal2-load-femtofarads:
    > + $ref: /schemas/types.yaml#/definitions/uint32
    > + minimum: 9000
    > + maximum: 25000
    > + description: Optional loading capacitor for XTAL2
    > +
    > patternProperties:
    > "^OUT[1-4]$":
    > type: object
    > --
    > 2.25.1
    >

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