Messages in this thread |  | | Date | Wed, 8 Jul 2020 06:36:46 -0700 | From | Andi Kleen <> | Subject | Re: [PATCH v12 06/11] KVM: vmx/pmu: Expose LBR to guest via MSR_IA32_PERF_CAPABILITIES |
| |
> + /* > + * As a first step, a guest could only enable LBR feature if its cpu > + * model is the same as the host because the LBR registers would > + * be pass-through to the guest and they're model specific. > + */ > + if (boot_cpu_data.x86_model != guest_cpuid_model(vcpu)) > + return false;
Could we relax this in a followon patch? (after this series is merged)
It's enough of the perf cap LBR version matches, don't need full model number match. This would require a way to configure the LBR version from qemu.
This would allow more flexibility, for example migration from Icelake to Skylake and vice versa.
-Andi
|  |