Messages in this thread |  | | Subject | Re: [PATCH v12 00/11] Guest Last Branch Recording Enabling | From | "Liang, Kan" <> | Date | Thu, 2 Jul 2020 09:11:06 -0400 |
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On 7/2/2020 3:40 AM, Peter Zijlstra wrote: > On Sat, Jun 13, 2020 at 04:09:45PM +0800, Like Xu wrote: >> Like Xu (10): >> perf/x86/core: Refactor hw->idx checks and cleanup >> perf/x86/lbr: Add interface to get LBR information >> perf/x86: Add constraint to create guest LBR event without hw counter >> perf/x86: Keep LBR records unchanged in host context for guest usage > >> Wei Wang (1): >> perf/x86: Fix variable types for LBR registers > >> arch/x86/events/core.c | 26 +-- >> arch/x86/events/intel/core.c | 109 ++++++++----- >> arch/x86/events/intel/lbr.c | 51 +++++- >> arch/x86/events/perf_event.h | 8 +- >> arch/x86/include/asm/perf_event.h | 34 +++- > > These look good to me; but at the same time Kan is sending me > Architectural LBR patches. > > Kan, if I take these perf patches and stick them in a tip/perf/vlbr > topic branch, can you rebase the arch lbr stuff on top, or is there > anything in the arch-lbr series that badly conflicts with this work? >
Yes, I can rebase the arch lbr patches on top of them. Please push the tip/perf/vlbr branch, so I can pull and rebase my patches.
Thanks, Kan
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