Messages in this thread |  | | Subject | Re: [PATCH v12 06/11] KVM: vmx/pmu: Expose LBR to guest via MSR_IA32_PERF_CAPABILITIES | From | "Xu, Like" <> | Date | Wed, 8 Jul 2020 22:38:02 +0800 |
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On 2020/7/8 21:36, Andi Kleen wrote: >> + /* >> + * As a first step, a guest could only enable LBR feature if its cpu >> + * model is the same as the host because the LBR registers would >> + * be pass-through to the guest and they're model specific. >> + */ >> + if (boot_cpu_data.x86_model != guest_cpuid_model(vcpu)) >> + return false; > Could we relax this in a followon patch? (after this series is merged) Sure, there would be a follow-on patch to relax this check after it's merged. > > It's enough of the perf cap LBR version matches, don't need full model > number match. I assume you are referring to the LBR_FMT value in the perf_capabilities. > This would require a way to configure the LBR version > from qemu. Sure, I may propose this configuration in the QEMU community. > > This would allow more flexibility, for example migration from > Icelake to Skylake and vice versa. Yes, we need this flexibility to cover as many platforms as possible.
Thanks, Like Xu > > -Andi
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