Messages in this thread Patch in this message | | | Date | Sun, 19 Apr 2020 22:31:48 +0200 | From | Thomas Gleixner <> | Subject | [patch 11/15] x86/tlb: Move cr4_set_bits_and_update_boot() to the usage site |
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No point in having this exposed.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de> --- arch/x86/include/asm/tlbflush.h | 14 -------------- arch/x86/mm/init.c | 13 +++++++++++++ 2 files changed, 13 insertions(+), 14 deletions(-)
--- a/arch/x86/include/asm/tlbflush.h +++ b/arch/x86/include/asm/tlbflush.h @@ -332,23 +332,9 @@ static inline void cr4_clear_bits(unsign local_irq_restore(flags); } -/* - * Save some of cr4 feature set we're using (e.g. Pentium 4MB - * enable and PPro Global page enable), so that any CPU's that boot - * up after us can get the correct flags. This should only be used - * during boot on the boot cpu. - */ extern unsigned long mmu_cr4_features; extern u32 *trampoline_cr4_features; -static inline void cr4_set_bits_and_update_boot(unsigned long mask) -{ - mmu_cr4_features |= mask; - if (trampoline_cr4_features) - *trampoline_cr4_features = mmu_cr4_features; - cr4_set_bits(mask); -} - extern void initialize_tlbstate_and_flush(void); /* --- a/arch/x86/mm/init.c +++ b/arch/x86/mm/init.c @@ -172,6 +172,19 @@ struct map_range { static int page_size_mask; +/* + * Save some of cr4 feature set we're using (e.g. Pentium 4MB + * enable and PPro Global page enable), so that any CPU's that boot + * up after us can get the correct flags. Invoked on the boot CPU. + */ +static inline void cr4_set_bits_and_update_boot(unsigned long mask) +{ + mmu_cr4_features |= mask; + if (trampoline_cr4_features) + *trampoline_cr4_features = mmu_cr4_features; + cr4_set_bits(mask); +} + static void __init probe_page_size_mask(void) { /*
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