Messages in this thread Patch in this message | | | From | Sherry Sun <> | Subject | [patch v3] EDAC: synopsys: Fix the wrong call of pinf->col parameter | Date | Mon, 16 Mar 2020 21:34:39 +0800 |
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Since ZynqMP platform call zynqmp_get_error_info() function to get ce/ue information. In this function, pinf->col parameter is not used, this parameter is only used by Zynq platforme in zynq_get_error_info(). So here pinf->col should not be called and printed for ZynqMP, need remove it.
In order to show which function called handle_error() explicitly, here use DDR_ECC_INTR_SUPPORT as check condition to distinguish Zynq and ZynqMP platform instead the current way.
Fixes: b500b4a029d57 ("EDAC, synopsys: Add ECC support for ZynqMP DDR controller") Signed-off-by: Sherry Sun <sherry.sun@nxp.com> Reviewed-by: Manish Narani <manish.narani@xilinx.com> --- Changes in V3: - Make the check condition in handle_error() more explicitly, use quirks & DDR_ECC_INTR_SUPPORT instead !quirks, and exchange the context in if/else.
Changes in V2: - Separated this patch from the original patchset.
--- drivers/edac/synopsys_edac.c | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c index 880ffd833718..12211dc040e8 100644 --- a/drivers/edac/synopsys_edac.c +++ b/drivers/edac/synopsys_edac.c @@ -477,16 +477,16 @@ static void handle_error(struct mem_ctl_info *mci, struct synps_ecc_status *p) if (p->ce_cnt) { pinf = &p->ceinfo; - if (!priv->p_data->quirks) { + if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) { snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, - "DDR ECC error type:%s Row %d Bank %d Col %d Bit Position: %d Data: 0x%08x", - "CE", pinf->row, pinf->bank, pinf->col, + "DDR ECC error type:%s Row %d Bank %d BankGroup Number %d Block Number %d Bit Position: %d Data: 0x%08x", + "CE", pinf->row, pinf->bank, + pinf->bankgrpnr, pinf->blknr, pinf->bitpos, pinf->data); } else { snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, - "DDR ECC error type:%s Row %d Bank %d Col %d BankGroup Number %d Block Number %d Bit Position: %d Data: 0x%08x", + "DDR ECC error type:%s Row %d Bank %d Col %d Bit Position: %d Data: 0x%08x", "CE", pinf->row, pinf->bank, pinf->col, - pinf->bankgrpnr, pinf->blknr, pinf->bitpos, pinf->data); } @@ -497,15 +497,15 @@ static void handle_error(struct mem_ctl_info *mci, struct synps_ecc_status *p) if (p->ue_cnt) { pinf = &p->ueinfo; - if (!priv->p_data->quirks) { + if (priv->p_data->quirks & DDR_ECC_INTR_SUPPORT) { snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, - "DDR ECC error type :%s Row %d Bank %d Col %d ", - "UE", pinf->row, pinf->bank, pinf->col); + "DDR ECC error type :%s Row %d Bank %d BankGroup Number %d Block Number %d", + "UE", pinf->row, pinf->bank, + pinf->bankgrpnr, pinf->blknr); } else { snprintf(priv->message, SYNPS_EDAC_MSG_SIZE, - "DDR ECC error type :%s Row %d Bank %d Col %d BankGroup Number %d Block Number %d", - "UE", pinf->row, pinf->bank, pinf->col, - pinf->bankgrpnr, pinf->blknr); + "DDR ECC error type :%s Row %d Bank %d Col %d ", + "UE", pinf->row, pinf->bank, pinf->col); } edac_mc_handle_error(HW_EVENT_ERR_UNCORRECTED, mci, -- 2.17.1
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