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Subject[PATCH v2] ARM: dts: sun8i-h3: Add thermal trip points/cooling maps
Date
This enables passive cooling by down-regulating CPU voltage
and frequency.

For trip points, I used a slightly lowered values from the BSP
code. The critical temperature of 110°C from BSP code seemed
like a lot, so I rounded it off to 100°C.

The critical trip point value is 30°C above the maximum recommended
ambient temperature (70°C) for the SoC from the datasheet, so there's
some headroom even at such a high ambient temperature.

Signed-off-by: Ondrej Jirman <megous@megous.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 25 +++++++++++++++++++++++++
1 file changed, 25 insertions(+)

v2:
- added more detail to the commit description

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 20217e2ca4d3a..e83aa6866e7ea 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -41,6 +41,7 @@
*/

#include "sunxi-h3-h5.dtsi"
+#include <dt-bindings/thermal/thermal.h>

/ {
cpu0_opp_table: opp_table0 {
@@ -227,6 +228,30 @@ cpu_thermal: cpu-thermal {
polling-delay-passive = <0>;
polling-delay = <0>;
thermal-sensors = <&ths 0>;
+
+ trips {
+ cpu_hot_trip: cpu-hot {
+ temperature = <80000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ cpu_very_hot_trip: cpu-very-hot {
+ temperature = <100000>;
+ hysteresis = <0>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ cpu-hot-limit {
+ trip = <&cpu_hot_trip>;
+ cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
};
};
};
--
2.25.1
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