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SubjectRe: [PATCH v3 02/19] dt-bindings: phy: Add Qualcomm Synopsys Hi-Speed USB PHY binding
On Wed, Jan 22, 2020 at 06:55:53PM +0000, Bryan O'Donoghue wrote:
> From: Sriharsha Allenki <sallenki@codeaurora.org>
>
> Adds bindings for QCS404 USB PHY supporting Low-Speed, Full-Speed and
> Hi-Speed USB connectivity on Qualcomm chipsets.
>
> [bod: Converted to YAML. Changed name dropping snps, 28nm components]
>
> Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
> Signed-off-by: Anu Ramanathan <anur@codeaurora.org>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> Cc: Andy Gross <agross@kernel.org>
> Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
> Cc: Kishon Vijay Abraham I <kishon@ti.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Mark Rutland <mark.rutland@arm.com>
> Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
> Cc: linux-arm-msm@vger.kernel.org
> Cc: linux-kernel@vger.kernel.org
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> ---
> .../bindings/phy/qcom,qcs404-usb-hs.yaml | 77 +++++++++++++++++++
> 1 file changed, 77 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml b/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml
> new file mode 100644
> index 000000000000..d71beb822ae2
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,qcs404-usb-hs.yaml
> @@ -0,0 +1,77 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: "http://devicetree.org/schemas/phy/qcom,qcs404-usb-hs.yaml#"
> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> +
> +title: Qualcomm Synopsys QCS-404 High-Speed PHY
> +
> +maintainers:
> + - Bryan O'Donoghue <bryan.odonoghue@linaro.org>
> +
> +description: |
> + Qualcomm QCS-404 Low-Speed, Full-Speed, Hi-Speed USB PHY
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,qcs404-usb-hsphy
> +
> + reg:
> + maxItems: 1
> + description: USB PHY base address and length of the register map.
> +
> + "#phy-cells":
> + const: 0
> + description: Should be 0. See phy/phy-bindings.txt for details.
> +
> + clocks:
> + minItems: 3
> + maxItems: 3
> + description: phandles to rpmcc ref clock, PHY AHB clock, rentention clock.
> +
> + clock-names:
> + items:
> + - const: ref
> + - const: phy
> + - const: sleep
> +
> + resets:
> + items:
> + - description: PHY core reset
> + - description: POR reset
> +
> + reset-names:
> + items:
> + - const: phy
> + - const: por
> +
> + vdd-supply:
> + maxItems: 1
Supplies are always 1 entry, so drop this.

> + description: phandle to the regulator VDD supply node.
> +
> + vdda1p8-supply:
> + maxItems: 1
> + description: phandle to the regulator 1.8V supply node.
> +
> + vdda3p3-supply:
> + maxItems: 1
> + description: phandle to the regulator 3.3V supply node.

No required properties?

Add:

additionalProperties: false

> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-qcs404.h>
> + #include <dt-bindings/clock/qcom,rpmcc.h>
> + usb2_phy_prim: phy@7a000 {
> + compatible = "qcom,qcs404-usb-hsphy";
> + reg = <0x0007a000 0x200>;
> + #phy-cells = <0>;
> + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
> + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
> + <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
> + clock-names = "ref", "phy", "sleep";
> + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
> + <&gcc GCC_USB2A_PHY_BCR>;
> + reset-names = "phy", "por";
> + };
> +...
> --
> 2.25.0
>

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