| From | Greg Kroah-Hartman <> | Subject | [PATCH 4.19 047/306] PCI: mediatek: Fix class type for MT7622 to PCI_CLASS_BRIDGE_PCI | Date | Wed, 27 Nov 2019 21:28:17 +0100 |
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From: Honghui Zhang <honghui.zhang@mediatek.com>
[ Upstream commit a7f172ab6a8e755e60311f27512034b0441ef421 ]
commit 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") erroneously set the class type for MT7622 to PCI_CLASS_BRIDGE_HOST.
The PCIe controller of MT7622 integrates a Root Port that has type 1 configuration space header and related bridge windows.
The HW default value of this bridge's class type is invalid.
Fix its class type and set it to PCI_CLASS_BRIDGE_PCI to match the hardware implementation.
Fixes: 101c92dc80c8 ("PCI: mediatek: Set up vendor ID and class type for MT7622") Signed-off-by: Honghui Zhang <honghui.zhang@mediatek.com> [lorenzo.pieralisi@arm.com: reworked the commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Sasha Levin <sashal@kernel.org> --- drivers/pci/controller/pcie-mediatek.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/controller/pcie-mediatek.c b/drivers/pci/controller/pcie-mediatek.c index 0d100f56cb884..8d1364c317747 100644 --- a/drivers/pci/controller/pcie-mediatek.c +++ b/drivers/pci/controller/pcie-mediatek.c @@ -432,7 +432,7 @@ static int mtk_pcie_startup_port_v2(struct mtk_pcie_port *port) val = PCI_VENDOR_ID_MEDIATEK; writew(val, port->base + PCIE_CONF_VEND_ID); - val = PCI_CLASS_BRIDGE_HOST; + val = PCI_CLASS_BRIDGE_PCI; writew(val, port->base + PCIE_CONF_CLASS_ID); } -- 2.20.1
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