Messages in this thread | | | Date | Sun, 18 Mar 2018 21:15:19 +0100 | From | Maxime Ripard <> | Subject | Re: [PATCH v4 3/9] pinctrl: sunxi: change irq_bank_base to irq_bank_map |
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On Fri, Mar 16, 2018 at 10:02:09PM +0800, Icenowy Zheng wrote: > The Allwinner H6 SoC have its pin controllers with the first IRQ-capable > GPIO bank at IRQ bank 1 and the second bank at IRQ bank 5. > > Change the current code that uses IRQ bank base to a IRQ bank map, in > order to support the case that holes exist among IRQ banks. > > Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Thanks! Maxime
-- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com [unhandled content-type:application/pgp-signature] | |