Messages in this thread | | | Date | Fri, 20 Jun 2014 12:39:36 +0530 | Subject | Re: [patch 13/13] irqchip: spear_shirq: Simplify register access code | From | Viresh Kumar <> |
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On Fri, Jun 20, 2014 at 3:04 AM, Thomas Gleixner <tglx@linutronix.de> wrote:
> Index: linux/drivers/irqchip/spear-shirq.c > -struct shirq_regs { > - u32 enb_reg; > - u32 reset_to_enb;
I don't see something similar to 'reset_to_enb' is added again. AFAICT, this field is being used by two blocks:
spear300_shirq_ras1: writes 0 to this. i.e. we need to write 0 to mask the interrupt
and
spear320_shirq_ras3: writes 1 to this. i.e. we need to write 1 to mask the interrupt.
And so the new code you have added breaks it for SPEAr300 ?
> - u32 status_reg; > -};
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