lkml.org 
[lkml]   [2013]   [Aug]   [9]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
Patch in this message
/
From
Subject[PATCH] usb: dwc3: core: clarify usb-phy array binding
Date
The binding spec wasn't clear that the order of the phandles in the
usb-phy array has meaning. Clarify this point in the binding that
it should be <USB2-HS-PHY, USB3-SS-PHY>.

Signed-off-by: Kumar Gala <galak@codeaurora.org>
---
Documentation/devicetree/bindings/usb/dwc3.txt | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt
index 7a95c65..8a9770b 100644
--- a/Documentation/devicetree/bindings/usb/dwc3.txt
+++ b/Documentation/devicetree/bindings/usb/dwc3.txt
@@ -6,7 +6,9 @@ Required properties:
- compatible: must be "synopsys,dwc3"
- reg : Address and length of the register set for the device
- interrupts: Interrupts used by the dwc3 controller.
- - usb-phy : array of phandle for the PHY device
+ - usb-phy : array of phandle for the PHY device. The first element
+ in the array is expected to be a handle to the USB2/HS PHY and
+ the second element is expected to be a handle to the USB3/SS PHY

Optional properties:
- tx-fifo-resize: determines if the FIFO *has* to be reallocated.
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation


\
 
 \ /
  Last update: 2013-08-09 18:01    [W:0.110 / U:0.132 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site