Messages in this thread | | | Date | Sat, 14 Jan 2006 01:41:43 +0100 | From | Andreas Steinmetz <> | Subject | Re: Dual core Athlons and unsynced TSCs |
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David Lang wrote: > On Fri, 13 Jan 2006, Sven-Thorsten Dietrich wrote: > >> On Fri, 2006-01-13 at 14:05 -0800, David Lang wrote: >> >>> On Fri, 13 Jan 2006 thockin@hockin.org wrote: >>> >>>> On Fri, Jan 13, 2006 at 01:18:35PM -0800, David Lang wrote: >>>> >>>>> Lee, the last time I saw this discussion I thought it was >>>>> identified that >>>>> the multiple cores (or IIRC the multiple chips in a SMP >>>>> motherboard) would >>>>> only get out of sync when power management calls were made (hlt or >>>>> switching the c-state). IIRC the workaround that was posted then >>>>> was to >>>>> just disable these in the kernel build. >>>> >>>> >>>> not using 'hlt' when idling means that you spend 10s of Watts more >>>> power >>>> on mostly idle systems. >>> >>> >>> true, but for people who need better time accruacy then the other >>> workaround this may be very acceptable. >>> >> >> 1/4 KW / day for time synchronisation. >> >> The power company would love that. > > > more precisely 1/4 KW Hour / day > > $0.01 - $0.02/day (I had to lookup the current rates) > > they probably won't notice. >
Well, wait until there's AMD based dual core x86_64 laptops out there (this email being written on a single core x86_64 one). I can already see the faces of the unhappy future owners being told "use idle=poll" when on battery and anyway going deaf by fan noise.
(/me ducks and runs) -- Andreas Steinmetz SPAMmers use robotrap@domdv.de - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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