Messages in this thread | | | Date | Wed, 24 Apr 2024 11:41:05 +0800 | Subject | Re: [PATCH v3 1/1] iommu/vt-d: Remove caching mode check before device TLB flush | From | Baolu Lu <> |
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On 4/15/24 9:38 AM, Lu Baolu wrote: > The Caching Mode (CM) of the Intel IOMMU indicates if the hardware > implementation caches not-present or erroneous translation-structure > entries except for the first-stage translation. The caching mode is > irrelevant to the device TLB, therefore there is no need to check it > before a device TLB invalidation operation. > > Remove two caching mode checks before device TLB invalidation in the > driver. The removal of these checks doesn't change the driver's behavior > in critical map/unmap paths. Hence, there is no functionality or > performance impact, especially since commit <29b32839725f> ("iommu/vt-d: > Do not use flush-queue when caching-mode is on") has already disabled > flush-queue for caching mode. Therefore, caching mode will never call > intel_flush_iotlb_all(). > > Signed-off-by: Lu Baolu<baolu.lu@linux.intel.com> > Reviewed-by: Kevin Tian<kevin.tian@intel.com> > --- > drivers/iommu/intel/iommu.c | 9 ++------- > 1 file changed, 2 insertions(+), 7 deletions(-)
Patch has been queued for iommu/vt-d.
Best regards, baolu
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