Messages in this thread | | | Date | Tue, 6 Feb 2024 18:35:17 +0100 | From | Luca Ceresoli <> | Subject | Re: [PATCH V8 02/12] phy: freescale: add Samsung HDMI PHY |
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On Sat, 3 Feb 2024 10:52:42 -0600 Adam Ford <aford173@gmail.com> wrote:
> From: Lucas Stach <l.stach@pengutronix.de> > > This adds the driver for the Samsung HDMI PHY found on the > i.MX8MP SoC. > > Signed-off-by: Lucas Stach <l.stach@pengutronix.de> > Signed-off-by: Adam Ford <aford173@gmail.com> > Tested-by: Alexander Stein <alexander.stein@ew.tq-group.com>
[...]
> +#define PHY_REG_33 0x84 > +#define REG33_MODE_SET_DONE BIT(7) > +#define REG33_FIX_DA BIT(1) > + > +#define PHY_REG_34 0x88 > +#define REG34_PHY_READY BIT(7) > +#define REG34_PLL_LOCK BIT(6) > +#define REG34_PHY_CLK_READY BIT(5) > + > +
Nitpick: only one empty line here.
> +#define PHY_PLL_REGS_NUM 48
[...]
> +static int phy_clk_register(struct fsl_samsung_hdmi_phy *phy) > +{ > + struct device *dev = phy->dev; > + struct device_node *np = dev->of_node; > + struct clk_init_data init; > + const char *parent_name; > + struct clk *phyclk; > + int ret; > + > + parent_name = __clk_get_name(phy->refclk); > + > + init.parent_names = &parent_name; > + init.num_parents = 1; > + init.flags = 0; > + init.name = "hdmi_pclk"; > + init.ops = &phy_clk_ops; > + > + phy->hw.init = &init; > + > + phyclk = devm_clk_register(dev, &phy->hw); > + if (IS_ERR(phyclk)) > + return dev_err_probe(dev, PTR_ERR(phyclk), > + "failed to register clock\n"); > + > + ret = of_clk_add_provider(np, of_clk_src_simple_get, phyclk);
Ouch:
> This function is *deprecated*. Use of_clk_add_hw_provider() instead.
Appears as an easy replacement though.
Otherwise looks good.
Luca
-- Luca Ceresoli, Bootlin Embedded Linux and Kernel engineering https://bootlin.com
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