Messages in this thread | | | Date | Fri, 12 Jan 2024 19:27:18 +0530 | Subject | Re: [PATCH V1] PCI: Clear errors logged in Secondary Status Register | From | Vidya Sagar <> |
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Hi Bjorn, Do you have any comments for this patch?
Thanks, Vidya Sagar
On 1/4/2024 7:02 AM, Vidya Sagar wrote: > If a downstream port has a PCIe switch connected to it, the enumeration > process leaves the 'Received Master Abort' bit set in the Secondary > Status Register of the downstream port because of the Unsupported > Requests (URs) take place in the downstream hierarchy. Since the > ownership of Secondary Status Register always lies with the OS including > systems with Firmware-First approach for error handling[1], clear the > error status bits in the Secondary Status Register post enumeration. > > [1] https://lore.kernel.org/all/1fb9d746-0695-4d19-af98-f442f31cd464@nvidia.com/T/ > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > drivers/pci/probe.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c > index 43159965e09e..edf8202465d8 100644 > --- a/drivers/pci/probe.c > +++ b/drivers/pci/probe.c > @@ -1470,6 +1470,9 @@ static int pci_scan_bridge_extend(struct pci_bus *bus, struct pci_dev *dev, > } > > out: > + /* Clear errors in the Secondary Status Register */ > + pci_write_config_word(dev, PCI_SEC_STATUS, 0xffff); > + > pci_write_config_word(dev, PCI_BRIDGE_CONTROL, bctl); > > pm_runtime_put(&dev->dev);
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