Messages in this thread Patch in this message | | | From | Jeongtae Park <> | Subject | [PATCH] perf: CXL: fix mismatched number of counters mask | Date | Tue, 5 Sep 2023 21:33:09 +0900 |
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The number of Count Units field is described as 6 bits long in the CXL 3.0 specification. However, its mask value was only declared as 5 bits long.
Signed-off-by: Jeongtae Park <jtp.park@samsung.com> --- drivers/perf/cxl_pmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/perf/cxl_pmu.c b/drivers/perf/cxl_pmu.c index 0a8f597e695b..365d964b0f6a 100644 --- a/drivers/perf/cxl_pmu.c +++ b/drivers/perf/cxl_pmu.c @@ -25,7 +25,7 @@ #include "../cxl/pmu.h" #define CXL_PMU_CAP_REG 0x0 -#define CXL_PMU_CAP_NUM_COUNTERS_MSK GENMASK_ULL(4, 0) +#define CXL_PMU_CAP_NUM_COUNTERS_MSK GENMASK_ULL(5, 0) #define CXL_PMU_CAP_COUNTER_WIDTH_MSK GENMASK_ULL(15, 8) #define CXL_PMU_CAP_NUM_EVN_CAP_REG_SUP_MSK GENMASK_ULL(24, 20) #define CXL_PMU_CAP_FILTERS_SUP_MSK GENMASK_ULL(39, 32) base-commit: fe77cc2e5a6a7c85f5c6ef8a39d7694ffc7f41c9 -- 2.34.1
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