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Subject[PATCH v3 11/12] ARM: dts: stm32: add ethernet1 and ethernet2 for STM32MP135F-DK board
Date
Add dual Ethernet:
-Ethernet1: RMII with crystal
-Ethernet2: RMII without crystal
PHYs used are SMSC (LAN8742A)

With Ethernet1, we can performed WoL from PHY instead of GMAC point of view.
(in this case IRQ for WoL is managed as wakeup pin and configured
in OS secure).

Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
---
arch/arm/boot/dts/st/stm32mp135f-dk.dts | 48 +++++++++++++++++++++++++
1 file changed, 48 insertions(+)

diff --git a/arch/arm/boot/dts/st/stm32mp135f-dk.dts b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
index eea740d097c72..1316cc16f8dd9 100644
--- a/arch/arm/boot/dts/st/stm32mp135f-dk.dts
+++ b/arch/arm/boot/dts/st/stm32mp135f-dk.dts
@@ -19,6 +19,8 @@ / {
compatible = "st,stm32mp135f-dk", "st,stm32mp135";

aliases {
+ ethernet0 = &ethernet1;
+ ethernet1 = &ethernet2;
serial0 = &uart4;
serial1 = &usart1;
serial2 = &uart8;
@@ -93,6 +95,52 @@ channel@12 {
};
};

+&ethernet1 {
+ status = "okay";
+ pinctrl-0 = <&eth1_rmii_pins_a>;
+ pinctrl-1 = <&eth1_rmii_sleep_pins_a>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rmii";
+ max-speed = <100>;
+ phy-handle = <&phy0_eth1>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+
+ phy0_eth1: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0007.c131";
+ reset-gpios = <&mcp23017 9 GPIO_ACTIVE_LOW>;
+ reg = <0>;
+ wakeup-source;
+ };
+ };
+};
+
+&ethernet2 {
+ status = "okay";
+ pinctrl-0 = <&eth2_rmii_pins_a>;
+ pinctrl-1 = <&eth2_rmii_sleep_pins_a>;
+ pinctrl-names = "default", "sleep";
+ phy-mode = "rmii";
+ max-speed = <100>;
+ phy-handle = <&phy0_eth2>;
+ st,ext-phyclk;
+ phy-supply = <&scmi_v3v3_sw>;
+
+ mdio {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "snps,dwmac-mdio";
+ phy0_eth2: ethernet-phy@0 {
+ compatible = "ethernet-phy-id0007.c131";
+ reset-gpios = <&mcp23017 10 GPIO_ACTIVE_LOW>;
+ reg = <0>;
+ };
+ };
+};
+
&i2c1 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&i2c1_pins_a>;
--
2.25.1
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