Messages in this thread | | | Date | Wed, 27 Sep 2023 13:33:32 +0200 | Subject | Re: [PATCH v2 10/11] arm64: dts: qcom: ipq9574: include the GPLL0 as clock provider for mailbox | From | Konrad Dybcio <> |
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On 14.09.2023 09:00, Kathiravan Thirumoorthy wrote: > While the kernel is booting up, APSS PLL will be running at 800MHz with > GPLL0 as source. Once the cpufreq driver is available, APSS PLL will be > configured to the rate based on the opp table and the source also will > be changed to APSS_PLL_EARLY. So allow the mailbox to consume the GPLL0, > with this inclusion, CPU Freq correctly reports that CPU is running at > 800MHz rather than 24MHz. > > Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> > --- Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
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