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Subject[PATCH v2 0/4] spi: qup: Allow scaling power domains and interconnect
Date
Make it possible to scale performance states of the power domain and
interconnect of the SPI QUP controller in relation to the selected SPI
speed / core clock. This is done separately by:

- Parsing the OPP table from the device tree for performance state
votes of the power domain
- Voting for the necessary bandwidth on the interconnect path to DRAM

Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
---
Changes in v2:
- Vote for bandwidth only when DMA is used and not with PIO
- Add review tags from Krzysztof and Konrad
- Link to v1: https://lore.kernel.org/r/20230912-spi-qup-dvfs-v1-0-3e38aa09c2bd@kernkonzept.com

---
Stephan Gerhold (4):
spi: dt-bindings: qup: Document power-domains and OPP
spi: qup: Parse OPP table for DVFS support
spi: dt-bindings: qup: Document interconnects
spi: qup: Vote for interconnect bandwidth to DRAM

.../devicetree/bindings/spi/qcom,spi-qup.yaml | 13 ++++++
drivers/spi/spi-qup.c | 50 +++++++++++++++++++++-
2 files changed, 62 insertions(+), 1 deletion(-)
---
base-commit: baaa2957b0c6feb4ff7806b5d8e0039bd80acbdf
change-id: 20230912-spi-qup-dvfs-71fc8a5e0cb1

Best regards,
--
Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Kernkonzept GmbH at Dresden, Germany, HRB 31129, CEO Dr.-Ing. Michael Hohmuth

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