Messages in this thread | | | From | Benjamin Bara <> | Date | Mon, 18 Sep 2023 20:05:48 +0200 | Subject | Re: [PATCH 00/13] imx8mp: first clock propagation attempt (for LVDS) |
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Hi Frank!
On Mon, 18 Sept 2023 at 19:24, Frank Oltmanns <frank@oltmanns.dev> wrote: > On 2023-09-18 at 00:39:56 +0200, Benjamin Bara <bbara93@gmail.com> wrote: > Thank you very much for including me in the discussion. If I understood > Maxime correctly, your proposal is close to what he was suggesting in > the discussion you referenced. Unfortunately, it doesn't cover the > rounding aspect (which you also mentioned in your cover letter and the > description for clk_detect_unintended_rate_changes in patch 7. I've been > pondering the last three weeks how to find a good solution to this > problem, but so far haven't found any.
I think if we stick to the idea of always enforcing the exact "typical rate", we cannot avoid physically impossible cases. IMHO, it might make sense to add a set_rate() function with a "timing_entry" (e.g. used by display_timing.h[1]) to the clock API, which gives a suggestion but also defines the "real" boundaries. This would provide a shared parent PLL more freedom to provide a satisfying rate for all its children.
Regards Benjamin
[1] https://elixir.bootlin.com/linux/v6.5.3/source/include/video/display_timing.h#L64
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