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Subject[PATCH v2 5/6] arm64: dts: imx8ulp: update gpio node
From: Peng Fan <peng.fan@nxp.com>

The i.MX8ULP GPIO supports two interrupts and one register base, and not
compatible with i.MX7ULP. Update the node following dt-binding doc.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 21 ++++++++++++---------
1 file changed, 12 insertions(+), 9 deletions(-)

diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
index 8a6596d5a581..3921fdace792 100644
--- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi
@@ -484,11 +484,12 @@ fec: ethernet@29950000 {
};

gpioe: gpio@2d000080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2d000080 0x1000>, <0x2d000040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2d000000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc4 IMX8ULP_CLK_RGPIOE>,
@@ -498,11 +499,12 @@ gpioe: gpio@2d000080 {
};

gpiof: gpio@2d010080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2d010080 0x1000>, <0x2d010040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2d010000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc4 IMX8ULP_CLK_RGPIOF>,
@@ -533,11 +535,12 @@ pcc5: clock-controller@2da70000 {
};

gpiod: gpio@2e200080 {
- compatible = "fsl,imx8ulp-gpio", "fsl,imx7ulp-gpio";
- reg = <0x2e200080 0x1000>, <0x2e200040 0x40>;
+ compatible = "fsl,imx8ulp-gpio";
+ reg = <0x2e200000 0x1000>;
gpio-controller;
#gpio-cells = <2>;
- interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>;
interrupt-controller;
#interrupt-cells = <2>;
clocks = <&pcc5 IMX8ULP_CLK_RGPIOD>,
--
2.37.1

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