Messages in this thread Patch in this message | | | From | Andrew Cooper <> | Subject | [PATCH] x86/AMD: Fix ASM constraints in amd_clear_divider() | Date | Wed, 9 Aug 2023 21:23:56 +0100 |
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DIV writes its results into %eax and %edx, meaning that they need to be output constraints too. It happens to be benign in this case as the registers don't change value, but the compiler should still know.
Fixes: 77245f1c3c64 ("x86/CPU/AMD: Do not leak quotient data after a division by 0") Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> --- CC: Borislav Petkov <bp@alien8.de> CC: Linus Torvalds <torvalds@linux-foundation.org> CC: Thomas Gleixner <tglx@linutronix.de> CC: Ingo Molnar <mingo@redhat.com> CC: Dave Hansen <dave.hansen@linux.intel.com> CC: "H. Peter Anvin" <hpa@zytor.com> CC: x86@kernel.org CC: linux-kernel@vger.kernel.org --- arch/x86/kernel/cpu/amd.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index b55d8f82b621..8585a4be1912 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c @@ -1325,6 +1325,8 @@ bool cpu_has_ibpb_brtype_microcode(void) */ void noinstr amd_clear_divider(void) { + unsigned int a = 0, d = 0; + asm volatile(ALTERNATIVE("", "div %2\n\t", X86_BUG_DIV0) - :: "a" (0), "d" (0), "r" (1)); + : "+a" (a), "+d" (d) : "r" (1)); } base-commit: cacc6e22932f373a91d7be55a9b992dc77f4c59b -- 2.30.2
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