Messages in this thread | | | Date | Mon, 7 Aug 2023 16:10:34 -0500 | From | Andrew Halaney <> | Subject | Re: [PATCH 1/9] arm64: dts: qcom: sa8775p: add a node for the second serdes PHY |
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On Mon, Aug 07, 2023 at 09:34:59PM +0200, Bartosz Golaszewski wrote: > From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> > > Add a node for the SerDes PHY used by EMAC1 on sa8775p-ride. > > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
FWIW this seems to match downstream sources.
Reviewed-by: Andrew Halaney <ahalaney@redhat.com>
> --- > arch/arm64/boot/dts/qcom/sa8775p.dtsi | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > index 7b55cb701472..38d10af37ab0 100644 > --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi > +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi > @@ -1846,6 +1846,15 @@ serdes0: phy@8901000 { > status = "disabled"; > }; > > + serdes1: phy@8902000 { > + compatible = "qcom,sa8775p-dwmac-sgmii-phy"; > + reg = <0x0 0x08902000 0x0 0xe10>; > + clocks = <&gcc GCC_SGMI_CLKREF_EN>; > + clock-names = "sgmi_ref"; > + #phy-cells = <0>; > + status = "disabled"; > + }; > + > pdc: interrupt-controller@b220000 { > compatible = "qcom,sa8775p-pdc", "qcom,pdc"; > reg = <0x0 0x0b220000 0x0 0x30000>, > -- > 2.39.2 >
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