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SubjectRe: [PATCH RFC v2 08/18] cxl/region: Add Dynamic Capacity CXL region support
On Mon, 28 Aug 2023 22:20:59 -0700
Ira Weiny <ira.weiny@intel.com> wrote:

> CXL devices optionally support dynamic capacity. CXL Regions must be
> configured correctly to access this capacity. Similar to ram and pmem
> partitions, DC Regions represent different partitions of the DPA space.
>
> Interleaving is deferred due to the complexity of managing extents on
> multiple devices at the same time. However, there is nothing which
> directly prevents interleave support at this time. The check allows
> for early rejection.
>
> To maintain backwards compatibility with older software, CXL regions
> need a default DAX device to hold the reference for the region until it
> is deleted.
>
> Add create_dc_region sysfs entry to create DC regions. Share the logic
> of devm_cxl_add_dax_region() and region_is_system_ram(). Special case
> DC capable CXL regions to create a 0 sized seed DAX device until others
> can be created on dynamic space later.
>
> Flag dax_regions to indicate 0 capacity available until dax_region
> extents are supported by the region.
>
> Co-developed-by: Navneet Singh <navneet.singh@intel.com>
> Signed-off-by: Navneet Singh <navneet.singh@intel.com>
> Signed-off-by: Ira Weiny <ira.weiny@intel.com>
>
LGTM
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@Huawei.com>


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