Messages in this thread | | | Date | Wed, 23 Aug 2023 14:11:44 +0300 | From | "" <> | Subject | Re: [PATCHv2] x86/tdx: Mark TSC reliable |
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On Wed, Aug 23, 2023 at 04:47:29AM +0000, Huang, Kai wrote: > On Wed, 2023-08-23 at 02:18 +0300, Kirill A. Shutemov wrote: > > In x86 virtualization environments, including TDX, RDTSC instruction is > > handled without causing a VM exit, resulting in minimal overhead and > > jitters. On the other hand, other clock sources (such as HPET, ACPI > > timer, APIC, etc.) necessitate VM exits to implement, resulting in more > > fluctuating measurements compared to TSC. Thus, those clock sources are > > not effective for calibrating TSC. > > > > In TD guests, TSC is virtualized by the TDX module, which ensures: > > > > - Virtual TSC values are consistent among all the TD’s VCPUs; > > - Monotonously incrementing for any single VCPU; > > Nit: > > - Virtual TSC is monotonously incrementing ... > > Otherwise here "incrementing" looks like a noun, which means you need to use > "monotonous" rather than "monotonously".
Okay, will update.
> > - The frequency is determined by TD configuration. The host TSC is > > invariant on platforms where TDX is available. > > > > Reliable TSC is architectural guarantee for the TDX platform and it must > > work for any sane TDX implementation. > > > > Use TSC as the only reliable clock source in TD guests, bypassing > > unstable calibration. > > > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > > Acked-by: Kai Huang <kai.huang@intel.com>
Thanks.
-- Kiryl Shutsemau / Kirill A. Shutemov
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