Messages in this thread | | | Date | Wed, 23 Aug 2023 11:50:25 -0700 | From | Isaku Yamahata <> | Subject | Re: [PATCHv2] x86/tdx: Mark TSC reliable |
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On Wed, Aug 23, 2023 at 02:18:23AM +0300, "Kirill A. Shutemov" <kirill.shutemov@linux.intel.com> wrote:
> In x86 virtualization environments, including TDX, RDTSC instruction is > handled without causing a VM exit, resulting in minimal overhead and > jitters. On the other hand, other clock sources (such as HPET, ACPI > timer, APIC, etc.) necessitate VM exits to implement, resulting in more > fluctuating measurements compared to TSC. Thus, those clock sources are > not effective for calibrating TSC. > > In TD guests, TSC is virtualized by the TDX module, which ensures: > > - Virtual TSC values are consistent among all the TD’s VCPUs; > - Monotonously incrementing for any single VCPU; > - The frequency is determined by TD configuration. The host TSC is > invariant on platforms where TDX is available. > > Reliable TSC is architectural guarantee for the TDX platform and it must > work for any sane TDX implementation. > > Use TSC as the only reliable clock source in TD guests, bypassing > unstable calibration. > > Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com> > --- > v2: > - Slightly updated commit message; > --- > arch/x86/coco/tdx/tdx.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/x86/coco/tdx/tdx.c b/arch/x86/coco/tdx/tdx.c > index 1d6b863c42b0..1583ec64d92e 100644 > --- a/arch/x86/coco/tdx/tdx.c > +++ b/arch/x86/coco/tdx/tdx.c > @@ -769,6 +769,9 @@ void __init tdx_early_init(void) > > setup_force_cpu_cap(X86_FEATURE_TDX_GUEST); > > + /* TSC is the only reliable clock in TDX guest */ > + setup_force_cpu_cap(X86_FEATURE_TSC_RELIABLE); > + > cc_vendor = CC_VENDOR_INTEL; > tdx_parse_tdinfo(&cc_mask); > cc_set_mask(cc_mask); > -- > 2.41.0 > >
Reviewed-by: Isaku Yamahata <isaku.yamahata@intel.com> -- Isaku Yamahata <isaku.yamahata@linux.intel.com>
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