Messages in this thread Patch in this message | | | Date | Fri, 18 Aug 2023 00:03:30 +0800 | Subject | [PATCH] iommu/arm-smmu-v3: Simplify stage selection logic | From | Michael Shavit <> |
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It is invalid for an arm-smmu-v3 to have neither FEAT_TRANS_S1 nor FEAT_TRANS_S2 bits set, and this is even checked in the probe.
Only set ARM_SMMU_DOMAIN_S2 if FEAT_TRANS_S1 isn't supported, otherwise set ARM_SMMU_DOMAIN_S1. This is clearer as the existing code implies that something more sophisticated is going on with the stage selection logic.
Signed-off-by: Michael Shavit <mshavit@google.com> ---
drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 9b0dc35056019..e74c8c630adfa 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -2206,7 +2206,7 @@ static int arm_smmu_domain_finalise(struct iommu_domain *domain, /* Restrict the stage to what we can actually support */ if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S1)) smmu_domain->stage = ARM_SMMU_DOMAIN_S2; - if (!(smmu->features & ARM_SMMU_FEAT_TRANS_S2)) + else smmu_domain->stage = ARM_SMMU_DOMAIN_S1; switch (smmu_domain->stage) { base-commit: 6eaae198076080886b9e7d57f4ae06fa782f90ef -- 2.41.0.694.ge786442a9b-goog
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