Messages in this thread | | | From | Duje Mihanović <> | Subject | [PATCH v2 0/9] Initial Marvell PXA1908 support | Date | Thu, 27 Jul 2023 18:28:58 +0200 |
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v1 -> v2: - Remove earlycon patch as it's been merged into tty-next - Address maintainer comments: - Clarify GPIO regressions on older PXA platforms - Add Fixes tag to commit disabling GPIO pinctrl calls for this SoC - Add missing includes to clock driver - Clock driver uses HZ_PER_MHZ, u32_fract and GENMASK - Dual license clock bindings - Change clock IDs to decimal - Fix underscores in dt node names - Move chosen node to top of board dts - Clean up documentation - Reorder commits - Drop pxa,rev-id - Rename muic-i2c to i2c-muic - Reword some commits - Move framebuffer node to chosen - Add aliases for mmc nodes - Rebase on v6.5-rc3
Hello,
This series adds initial support for the Marvell PXA1908 SoC and "samsung,coreprimevelte", a smartphone using the SoC.
USB works and the phone can boot a rootfs from an SD card, but there are some warnings in the dmesg:
During SMP initialization: [ 0.006519] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU1: 0x00000000000000 [ 0.006542] CPU features: Unsupported CPU feature variation detected. [ 0.006589] CPU1: Booted secondary processor 0x0000000001 [0x410fd032] [ 0.010710] Detected VIPT I-cache on CPU2 [ 0.010716] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU2: 0x00000000000000 [ 0.010758] CPU2: Booted secondary processor 0x0000000002 [0x410fd032] [ 0.014849] Detected VIPT I-cache on CPU3 [ 0.014855] CPU features: SANITY CHECK: Unexpected variation in SYS_CNTFRQ_EL0. Boot CPU: 0x000000018cba80, CPU3: 0x00000000000000 [ 0.014895] CPU3: Booted secondary processor 0x0000000003 [0x410fd032]
SMMU probing fails: [ 0.101798] arm-smmu c0010000.iommu: probing hardware configuration... [ 0.101809] arm-smmu c0010000.iommu: SMMUv1 with: [ 0.101816] arm-smmu c0010000.iommu: no translation support!
On Samsung's PXA1908 phones, the bootloader does not start the ARM system timer, and my temporary solution (which isn't present in this series) was to put the code for starting the timer in the clock driver. Would this hack be accepted upstream in the form of a platform or clocksource driver such as drivers/clocksource/timer-mediatek-cpux.c?
A 3.14 based Marvell tree is available on GitHub acorn-marvell/brillo_pxa_kernel, and a Samsung one on GitHub CoderCharmander/g361f-kernel.
Andreas Färber attempted to upstream support for this SoC in 2017: https://lore.kernel.org/lkml/20170222022929.10540-1-afaerber@suse.de/
Andy Shevchenko (1): clk: mmp: Switch to use struct u32_fract instead of custom one
Duje Mihanović (8): gpio: pxa: disable pinctrl calls for MMP_GPIO gpio: pxa: use dynamic allocation of base dt-bindings: clock: Add Marvell PXA1908 clock bindings clk: mmp: Add Marvell PXA1908 clock driver dt-bindings: marvell: Document PXA1908 SoC arm64: Kconfig.platforms: Add config for Marvell PXA1908 platform arm64: dts: Add DTS for Marvell PXA1908 and samsung,coreprimevelte MAINTAINERS: add myself as Marvell PXA1908 maintainer
.../bindings/arm/marvell/marvell,pxa1908.yaml | 22 ++ .../bindings/clock/marvell,pxa1908.yaml | 47 +++ MAINTAINERS | 10 + arch/arm64/Kconfig.platforms | 11 + arch/arm64/boot/dts/marvell/Makefile | 3 + .../pxa1908-samsung-coreprimevelte.dts | 329 ++++++++++++++++++ arch/arm64/boot/dts/marvell/pxa1908.dtsi | 292 ++++++++++++++++ drivers/clk/mmp/Makefile | 2 +- drivers/clk/mmp/clk-frac.c | 57 ++- drivers/clk/mmp/clk-mmp2.c | 6 +- drivers/clk/mmp/clk-of-mmp2.c | 26 +- drivers/clk/mmp/clk-of-pxa168.c | 4 +- drivers/clk/mmp/clk-of-pxa1908.c | 286 +++++++++++++++ drivers/clk/mmp/clk-of-pxa1928.c | 6 +- drivers/clk/mmp/clk-of-pxa910.c | 4 +- drivers/clk/mmp/clk-pxa168.c | 4 +- drivers/clk/mmp/clk-pxa910.c | 4 +- drivers/clk/mmp/clk.h | 10 +- drivers/gpio/gpio-pxa.c | 2 + include/dt-bindings/clock/marvell,pxa1908.h | 93 +++++ 20 files changed, 1154 insertions(+), 64 deletions(-) create mode 100644 Documentation/devicetree/bindings/arm/marvell/marvell,pxa1908.yaml create mode 100644 Documentation/devicetree/bindings/clock/marvell,pxa1908.yaml create mode 100644 arch/arm64/boot/dts/marvell/pxa1908-samsung-coreprimevelte.dts create mode 100644 arch/arm64/boot/dts/marvell/pxa1908.dtsi create mode 100644 drivers/clk/mmp/clk-of-pxa1908.c create mode 100644 include/dt-bindings/clock/marvell,pxa1908.h
-- 2.41.0
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