Messages in this thread Patch in this message | | | From | Li RongQing <> | Subject | [PATCH] x86/apic: fix a printk precision vs width issue | Date | Wed, 12 Apr 2023 20:05:53 +0800 |
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when HZ is 1000, host bus clock speed is 99812KHz, apic shows 99.0812 MHz, since the width is 4 char but the max remainder is 3 char when HZ is 1000 [ 0.136739] ..... calibration result: 99812 [ 0.136930] ..... host bus clock speed is 99.0812 MHz.
fix it by keeping 3 char width, and using 1000 as divisor and the result is below: [ 0.136930] ..... host bus clock speed is 99.812 MHz.
Signed-off-by: Li RongQing <lirongqing@baidu.com> --- arch/x86/kernel/apic/apic.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c index 20d9a60..7e3b1bf 100644 --- a/arch/x86/kernel/apic/apic.c +++ b/arch/x86/kernel/apic/apic.c @@ -948,15 +948,15 @@ static int __init calibrate_APIC_clock(void) if (boot_cpu_has(X86_FEATURE_TSC)) { apic_printk(APIC_VERBOSE, "..... CPU clock speed is " - "%ld.%04ld MHz.\n", - (deltatsc / LAPIC_CAL_LOOPS) / (1000000 / HZ), - (deltatsc / LAPIC_CAL_LOOPS) % (1000000 / HZ)); + "%ld.%03ld MHz.\n", + ((deltatsc) / LAPIC_CAL_LOOPS) * HZ / 1000 / 1000, + ((deltatsc) / LAPIC_CAL_LOOPS) * HZ / 1000 % 1000); } apic_printk(APIC_VERBOSE, "..... host bus clock speed is " - "%u.%04u MHz.\n", - lapic_timer_period / (1000000 / HZ), - lapic_timer_period % (1000000 / HZ)); + "%u.%03u MHz.\n", + (lapic_timer_period * HZ / 1000) / 1000, + (lapic_timer_period * HZ / 1000) % 1000); /* * Do a sanity check on the APIC calibration result -- 2.9.4
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