Messages in this thread Patch in this message | | | From | "Peng Fan (OSS)" <> | Subject | [PATCH] clk: imx: pllv4: update the mult table | Date | Fri, 31 Mar 2023 15:17:12 +0800 |
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From: Jacky Bai <ping.bai@nxp.com>
On i.MX8ULP, the ARM PLL can run at 960MHz, so need to update the mult table to make sure the ARM PLL can get a correct PLL frequency as we expected.
Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> --- drivers/clk/imx/clk-pllv4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/imx/clk-pllv4.c b/drivers/clk/imx/clk-pllv4.c index 6e7e34571fc8..adbaad3e0110 100644 --- a/drivers/clk/imx/clk-pllv4.c +++ b/drivers/clk/imx/clk-pllv4.c @@ -47,7 +47,7 @@ struct clk_pllv4 { }; /* Valid PLL MULT Table */ -static const int pllv4_mult_table[] = {33, 27, 22, 20, 17, 16}; +static const int pllv4_mult_table[] = {40, 33, 27, 22, 20, 17, 16}; #define to_clk_pllv4(__hw) container_of(__hw, struct clk_pllv4, hw) -- 2.37.1
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