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SubjectRe: [PATCH v2 29/34] media: iris: implement power management
From
On 18.12.2023 12:32, Dikshita Agarwal wrote:
> From: Vikash Garodia <quic_vgarodia@quicinc.com>
>
> Hardware specific power sequence include programming specific
> sequence of registers. Implements this sequence for iris3.
>
> Introduce video device suspend and resume using runtime PM.
>
> Also, implement iris3 specific calculation for clock and
> bus bandwidth which depends on hardware configuration,
> codec format, resolution and frame rate.
>
> Signed-off-by: Vikash Garodia <quic_vgarodia@quicinc.com>
> Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
> ---
[...]

> @@ -97,6 +103,7 @@ static int iris_probe(struct platform_device *pdev)
return dev_err_probe, drop __func__

[...]

> + ret = readl_relaxed_poll_timeout(base_addr + reg, val, ((val & mask) == exp_val),
> + sleep_us, timeout_us);
> + /*
> + * Memory barrier to make sure value is read correctly from the
> + * register.
> + */
> + rmb();
just drop _relaxed and return directly

> +
> + return ret;
> +}
[...]

> + ret = read_register_with_poll_timeout(core, AON_WRAPPER_MVP_NOC_RESET_ACK,
> + 0x3, 0x3, 200, 2000);
that looks like a lot of bits/bitfields that deserve #defining in this
and some other functions

Konrad

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