Messages in this thread | | | Date | Thu, 2 Nov 2023 08:02:36 -0500 | Subject | Re: [PATCH v2] x86/resctrl: Fix unused variable warning in cache_alloc_hsw_probe() | From | "Moger, Babu" <> |
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Looks good.
On 11/1/23 16:26, Tony Luck wrote: > In a "W=1" build gcc throws a warning: > > arch/x86/kernel/cpu/resctrl/core.c: In function ‘cache_alloc_hsw_probe’: > arch/x86/kernel/cpu/resctrl/core.c:139:16: warning: variable ‘h’ set but not used > > Fix by switching from wrmsr_safe() to wrmsrl_safe(), and from rdmsr() > to rdmsrl() using a single u64 argument for the MSR value instead of > the pair of u32 for the high and low halves. > > Signed-off-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Babu Moger <babu.moger@amd.com>
> --- > Changes since v1 (suggested by Babu) > > Switch both the wrmsr() and rdmsr() to the 64-bit versions. > > arch/x86/kernel/cpu/resctrl/core.c | 8 ++++---- > 1 file changed, 4 insertions(+), 4 deletions(-) > > diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resctrl/core.c > index 19e0681f0435..d29ebe345de6 100644 > --- a/arch/x86/kernel/cpu/resctrl/core.c > +++ b/arch/x86/kernel/cpu/resctrl/core.c > @@ -136,15 +136,15 @@ static inline void cache_alloc_hsw_probe(void) > { > struct rdt_hw_resource *hw_res = &rdt_resources_all[RDT_RESOURCE_L3]; > struct rdt_resource *r = &hw_res->r_resctrl; > - u32 l, h, max_cbm = BIT_MASK(20) - 1; > + u64 max_cbm = BIT_ULL_MASK(20) - 1, l3_cbm_0; > > - if (wrmsr_safe(MSR_IA32_L3_CBM_BASE, max_cbm, 0)) > + if (wrmsrl_safe(MSR_IA32_L3_CBM_BASE, max_cbm)) > return; > > - rdmsr(MSR_IA32_L3_CBM_BASE, l, h); > + rdmsrl(MSR_IA32_L3_CBM_BASE, l3_cbm_0); > > /* If all the bits were set in MSR, return success */ > - if (l != max_cbm) > + if (l3_cbm_0 != max_cbm) > return; > > hw_res->num_closid = 4;
-- Thanks Babu Moger
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