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SubjectRe: [PATCH 1/2] dt-bindings: PCI: qcom: adjust iommu-map for different SoC
On Sun, Nov 12, 2023 at 07:45:56PM +0100, Krzysztof Kozlowski wrote:
> The PCIe controller on SDX55 has five entries in its iommu-map, MSM8998
> has one and SDM845 has sixteen, so allow wider number of items to fix
> dtbs_check warnings like:
>
> qcom-sdx55-mtp.dtb: pcie@1c00000: iommu-map: [[0, 21, 512, 1], [256, 21, 513, 1],
> [512, 21, 514, 1], [768, 21, 515, 1], [1024, 21, 516, 1]] is too long
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>

Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

- Mani

> ---
> Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> index 8bfae8eb79a3..14d25e8a18e4 100644
> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
> @@ -62,7 +62,8 @@ properties:
> maxItems: 8
>
> iommu-map:
> - maxItems: 2
> + minItems: 1
> + maxItems: 16
>
> # Common definitions for clocks, clock-names and reset.
> # Platform constraints are described later.
> --
> 2.34.1
>

--
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