Messages in this thread Patch in this message | | | From | Jianheng Zhang <> | Subject | [PATCH] net: stmmac: fix FPE events losing | Date | Tue, 14 Nov 2023 11:07:34 +0000 |
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The 32-bit access of register MAC_FPE_CTRL_STS may clear the FPE status bits unexpectedly. Use 8-bit access for MAC_FPE_CTRL_STS control bits to avoid unexpected access of MAC_FPE_CTRL_STS status bits that can reduce the FPE handshake retries.
The bit[19:17] of register MAC_FPE_CTRL_STS are status register bits. Those bits are clear on read (or write of 1 when RCWE bit in MAC_CSR_SW_Ctrl register is set). Using 32-bit access for MAC_FPE_CTRL_STS control bits makes side effects that clear the status bits. Then the stmmac interrupt handler missing FPE event status and leads to FPE handshake failure and retries.
The bit[7:0] of register MAC_FPE_CTRL_STS are control bits or reserved that have no access side effects, so can use 8-bit access for MAC_FPE_CTRL_STS control bits.
Fixes: 5a5586112b92 ("net: stmmac: support FPE link partner hand-shaking procedure") Signed-off-by: jianheng <jianheng@synopsys.com> --- drivers/net/ethernet/stmicro/stmmac/dwmac5.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac5.c b/drivers/net/ethernet/stmicro/stmmac/dwmac5.c index e95d35f..7333995 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac5.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac5.c @@ -716,11 +716,11 @@ void dwmac5_fpe_configure(void __iomem *ioaddr, u32 num_txq, u32 num_rxq, u32 value; if (!enable) { - value = readl(ioaddr + MAC_FPE_CTRL_STS); + value = readb(ioaddr + MAC_FPE_CTRL_STS); value &= ~EFPE; - writel(value, ioaddr + MAC_FPE_CTRL_STS); + writeb(value, ioaddr + MAC_FPE_CTRL_STS); return; } @@ -729,9 +729,9 @@ void dwmac5_fpe_configure(void __iomem *ioaddr, u32 num_txq, u32 num_rxq, value |= (num_rxq - 1) << GMAC_RXQCTRL_FPRQ_SHIFT; writel(value, ioaddr + GMAC_RXQ_CTRL1); - value = readl(ioaddr + MAC_FPE_CTRL_STS); + value = readb(ioaddr + MAC_FPE_CTRL_STS); value |= EFPE; - writel(value, ioaddr + MAC_FPE_CTRL_STS); + writeb(value, ioaddr + MAC_FPE_CTRL_STS); } int dwmac5_fpe_irq_status(void __iomem *ioaddr, struct net_device *dev) @@ -770,7 +770,7 @@ void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, enum stmmac_mpacket_type type { u32 value; - value = readl(ioaddr + MAC_FPE_CTRL_STS); + value = readb(ioaddr + MAC_FPE_CTRL_STS); if (type == MPACKET_VERIFY) { value &= ~SRSP; @@ -780,5 +780,5 @@ void dwmac5_fpe_send_mpacket(void __iomem *ioaddr, enum stmmac_mpacket_type type value |= SRSP; } - writel(value, ioaddr + MAC_FPE_CTRL_STS); + writeb(value, ioaddr + MAC_FPE_CTRL_STS); } -- 1.8.3.1
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