Messages in this thread | | | Date | Mon, 2 Oct 2023 13:19:51 +0100 | From | Conor Dooley <> | Subject | Re: [PATCH 4/5] riscv: dts: sophgo: add initial CV1800B SoC device tree |
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On Sat, Sep 30, 2023 at 08:39:36PM +0800, Jisheng Zhang wrote:
> + plic: interrupt-controller@70000000 { > + compatible = "sophgo,cv1800b-plic", "thead,c900-plic";
This fails dtbs_check, the compatible you added to the binding is cv1800-plic.
> + reg = <0x70000000 0x4000000>; > + interrupts-extended = <&cpu0_intc 11>, <&cpu0_intc 9>; > + interrupt-controller; > + #address-cells = <0>; > + #interrupt-cells = <2>; > + riscv,ndev = <101>; > + };
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