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Subject[PATCH v1 01/13] riscv: fatorize hwprobe ISA extension reporting
Date
Factorize ISA extension reporting by using a macro rather than
copy/pasting extension names. This will allow adding new extensions more
easily.

Signed-off-by: Clément Léger <cleger@rivosinc.com>
---
arch/riscv/kernel/sys_riscv.c | 26 ++++++++++++--------------
1 file changed, 12 insertions(+), 14 deletions(-)

diff --git a/arch/riscv/kernel/sys_riscv.c b/arch/riscv/kernel/sys_riscv.c
index 473159b5f303..5ce593ce07a4 100644
--- a/arch/riscv/kernel/sys_riscv.c
+++ b/arch/riscv/kernel/sys_riscv.c
@@ -145,20 +145,18 @@ static void hwprobe_isa_ext0(struct riscv_hwprobe *pair,
for_each_cpu(cpu, cpus) {
struct riscv_isainfo *isainfo = &hart_isa[cpu];

- if (riscv_isa_extension_available(isainfo->isa, ZBA))
- pair->value |= RISCV_HWPROBE_EXT_ZBA;
- else
- missing |= RISCV_HWPROBE_EXT_ZBA;
-
- if (riscv_isa_extension_available(isainfo->isa, ZBB))
- pair->value |= RISCV_HWPROBE_EXT_ZBB;
- else
- missing |= RISCV_HWPROBE_EXT_ZBB;
-
- if (riscv_isa_extension_available(isainfo->isa, ZBS))
- pair->value |= RISCV_HWPROBE_EXT_ZBS;
- else
- missing |= RISCV_HWPROBE_EXT_ZBS;
+#define CHECK_ISA_EXT(__ext) \
+ do { \
+ if (riscv_isa_extension_available(isainfo->isa, __ext)) \
+ pair->value |= RISCV_HWPROBE_EXT_##__ext; \
+ else \
+ missing |= RISCV_HWPROBE_EXT_##__ext; \
+ } while (false) \
+
+ CHECK_ISA_EXT(ZBA);
+ CHECK_ISA_EXT(ZBB);
+ CHECK_ISA_EXT(ZBS);
+#undef CHECK_ISA_EXT
}

/* Now turn off reporting features if any CPU is missing it. */
--
2.42.0
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