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Subject[PATCH v2 0/3] arm64: perf: Add support for event counting threshold
Date
Changes since v1:

* Fix build on aarch32 by disabling FEAT_PMUv3_TH and splitting event
type mask between the platforms
* Change armv8pmu_write_evtype() to take unsigned long instead of u64
so it isn't unnecessarily wide on aarch32
* Add UL suffix to aarch64 event type mask definition

----

FEAT_PMUv3_TH (Armv8.8) is a new feature that allows conditional
counting of PMU events depending on how much the event increments on
a single cycle. Two new config fields for perf_event_open have been
added, and a PMU cap file for reading the max_threshold. See the second
commit message and the docs in the last commit for more details.

The change has been validated on the Arm FVP model:

# Zero values, works as expected (as before).
$ perf stat -e dtlb_walk/threshold=0,threshold_control=0/ -- true

5962 dtlb_walk/threshold=0,threshold_control=0/

# Threshold >= 255 causes count to be 0 because dtlb_walk doesn't
# increase by more than 1 per cycle.
$ perf stat -e dtlb_walk/threshold=255,threshold_control=5/ -- true

0 dtlb_walk/threshold=255,threshold_control=5/

# Keeping comparison as >= but lowering the threshold to 1 makes the
# count return.
$ perf stat -e dtlb_walk/threshold=1,threshold_control=5/ -- true

6329 dtlb_walk/threshold=1,threshold_control=5/


James Clark (3):
arm: perf: Include threshold control fields valid in PMEVTYPER mask
arm64: perf: Add support for event counting threshold
Documentation: arm64: Document the PMU event counting threshold
feature

Documentation/arch/arm64/perf.rst | 58 ++++++++++++++++++++++++++
arch/arm/include/asm/arm_pmuv3.h | 3 ++
arch/arm64/include/asm/arm_pmuv3.h | 4 ++
arch/arm64/kvm/pmu-emul.c | 1 +
arch/arm64/kvm/sys_regs.c | 1 +
drivers/perf/arm_pmuv3.c | 67 +++++++++++++++++++++++++++++-
include/linux/perf/arm_pmuv3.h | 4 +-
7 files changed, 136 insertions(+), 2 deletions(-)


base-commit: 94f6f0550c625fab1f373bb86a6669b45e9748b3
--
2.34.1

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