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SubjectRe: [PATCH 02/18] clk: qcom: add the GCC driver for sa8775p
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On 9.01.2023 18:58, Konrad Dybcio wrote:
>
>
> On 9.01.2023 18:44, Bartosz Golaszewski wrote:
>> From: Shazad Hussain <quic_shazhuss@quicinc.com>
>>
>> Add support for the Global Clock Controller found in the QTI SA8775P
>> platforms.
>>
>> Signed-off-by: Shazad Hussain <quic_shazhuss@quicinc.com>
>> [Bartosz: made the driver ready for upstream]
>> Co-developed-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>> ---
> [...]
>
>> +
>> +static struct gdsc usb20_prim_gdsc = {
>> + .gdscr = 0x1C004,
> Please use lowercase hex literals outside #defines.
>
>> + .pd = {
>> + .name = "usb20_prim_gdsc",
>> + },
>> + .pwrsts = PWRSTS_OFF_ON,
>> +};
>> +
> [...]
>
>> +
>> +static const struct regmap_config gcc_sa8775p_regmap_config = {
>> + .reg_bits = 32,
>> + .reg_stride = 4,
>> + .val_bits = 32,
>> + .max_register = 0x472cffc,
> This is faaaaar more than what your DT node specifies.
>
> With these two fixed, LGTM:
>
> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>
> Konrad
>> + .fast_io = true,
>> +};
>> +
>> +static const struct qcom_cc_desc gcc_sa8775p_desc = {
>> + .config = &gcc_sa8775p_regmap_config,
>> + .clks = gcc_sa8775p_clocks,
>> + .num_clks = ARRAY_SIZE(gcc_sa8775p_clocks),
>> + .resets = gcc_sa8775p_resets,
>> + .num_resets = ARRAY_SIZE(gcc_sa8775p_resets),
>> + .gdscs = gcc_sa8775p_gdscs,
>> + .num_gdscs = ARRAY_SIZE(gcc_sa8775p_gdscs),
>> +};
>> +
>> +static const struct of_device_id gcc_sa8775p_match_table[] = {
>> + { .compatible = "qcom,gcc-sa8775p" },
One more thing, this should be qcom,sa8775p-gcc.

Konrad
>> + { }
>> +};
>> +MODULE_DEVICE_TABLE(of, gcc_sa8775p_match_table);
>> +
>> +static int gcc_sa8775p_probe(struct platform_device *pdev)
>> +{
>> + struct regmap *regmap;
>> + int ret;
>> +
>> + regmap = qcom_cc_map(pdev, &gcc_sa8775p_desc);
>> + if (IS_ERR(regmap))
>> + return PTR_ERR(regmap);
>> +
>> + ret = qcom_cc_register_rcg_dfs(regmap, gcc_dfs_clocks,
>> + ARRAY_SIZE(gcc_dfs_clocks));
>> + if (ret)
>> + return ret;
>> +
>> + /*
>> + * Keep the clocks always-ON
>> + * GCC_CAMERA_AHB_CLK, GCC_CAMERA_XO_CLK, GCC_DISP1_AHB_CLK,
>> + * GCC_DISP1_XO_CLK, GCC_DISP_AHB_CLK, GCC_DISP_XO_CLK,
>> + * GCC_GPU_CFG_AHB_CLK, GCC_VIDEO_AHB_CLK, GCC_VIDEO_XO_CLK.
>> + */
>> + regmap_update_bits(regmap, 0x32004, BIT(0), BIT(0));
>> + regmap_update_bits(regmap, 0x32020, BIT(0), BIT(0));
>> + regmap_update_bits(regmap, 0xc7004, BIT(0), BIT(0));
>> + regmap_update_bits(regmap, 0xc7018, BIT(0), BIT(0));
>> + regmap_update_bits(regmap, 0x33004, BIT(0), BIT(0));
>> + regmap_update_bits(regmap, 0x33018, BIT(0), BIT(0));
>> + regmap_update_bits(regmap, 0x7d004, BIT(0), BIT(0));
>> + regmap_update_bits(regmap, 0x34004, BIT(0), BIT(0));
>> + regmap_update_bits(regmap, 0x34024, BIT(0), BIT(0));
>> +
>> + return qcom_cc_really_probe(pdev, &gcc_sa8775p_desc, regmap);
>> +}
>> +
>> +static struct platform_driver gcc_sa8775p_driver = {
>> + .probe = gcc_sa8775p_probe,
>> + .driver = {
>> + .name = "gcc-sa8775p",
>> + .of_match_table = gcc_sa8775p_match_table,
>> + },
>> +};
>> +
>> +static int __init gcc_sa8775p_init(void)
>> +{
>> + return platform_driver_register(&gcc_sa8775p_driver);
>> +}
>> +subsys_initcall(gcc_sa8775p_init);
>> +
>> +static void __exit gcc_sa8775p_exit(void)
>> +{
>> + platform_driver_unregister(&gcc_sa8775p_driver);
>> +}
>> +module_exit(gcc_sa8775p_exit);
>> +
>> +MODULE_DESCRIPTION("Qualcomm SA8775P GCC driver");
>> +MODULE_LICENSE("GPL");

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