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    SubjectRe: [RFT PATCH v3 3/4] arm64: dts: exynos: add unit address to DWC3 node wrapper in Exynos5433
    From
    On 27.01.2023 22:27, Krzysztof Kozlowski wrote:
    > Neither simple-bus bindings nor dtc W=1 accept device nodes in soc@ node
    > which do not have unit address. Therefore usethe address space
    > of child device (actual DWC3 Controller) as the wrapper's address to
    > fix:
    >
    > exynos5433-tm2e.dtb: soc@0: usbdrd: {'compatible': ['samsung,exynos5433-dwusb3'], ...
    > should not be valid under {'type': 'object'}
    >
    > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
    Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
    > ---
    >
    > Changes since v2:
    > 1. Fix typo/build error.
    >
    > Changes since v1:
    > 1. New patch
    > ---
    > arch/arm64/boot/dts/exynos/exynos5433.dtsi | 16 ++++++++--------
    > 1 file changed, 8 insertions(+), 8 deletions(-)
    >
    > diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
    > index 9da24fe958a3..5519a80576c5 100644
    > --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
    > +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi
    > @@ -1742,7 +1742,7 @@ hsi2c_11: i2c@14df0000 {
    > status = "disabled";
    > };
    >
    > - usbdrd30: usbdrd {
    > + usbdrd30: usb@15400000 {
    > compatible = "samsung,exynos5433-dwusb3";
    > clocks = <&cmu_fsys CLK_ACLK_USBDRD30>,
    > <&cmu_fsys CLK_SCLK_USBDRD30>,
    > @@ -1751,16 +1751,16 @@ usbdrd30: usbdrd {
    > clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
    > #address-cells = <1>;
    > #size-cells = <1>;
    > - ranges;
    > + ranges = <0x0 0x15400000 0x10000>;
    > status = "disabled";
    >
    > - usbdrd_dwc3: usb@15400000 {
    > + usbdrd_dwc3: usb@0 {
    > compatible = "snps,dwc3";
    > clocks = <&cmu_fsys CLK_SCLK_USBDRD30>,
    > <&cmu_fsys CLK_ACLK_USBDRD30>,
    > <&cmu_fsys CLK_SCLK_USBDRD30>;
    > clock-names = "ref", "bus_early", "suspend";
    > - reg = <0x15400000 0x10000>;
    > + reg = <0x0 0x10000>;
    > interrupts = <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>;
    > phys = <&usbdrd30_phy 0>, <&usbdrd30_phy 1>;
    > phy-names = "usb2-phy", "usb3-phy";
    > @@ -1795,7 +1795,7 @@ usbhost30_phy: phy@15580000 {
    > status = "disabled";
    > };
    >
    > - usbhost30: usbhost {
    > + usbhost30: usb@15a00000 {
    > compatible = "samsung,exynos5433-dwusb3";
    > clocks = <&cmu_fsys CLK_ACLK_USBHOST30>,
    > <&cmu_fsys CLK_SCLK_USBHOST30>,
    > @@ -1804,16 +1804,16 @@ usbhost30: usbhost {
    > clock-names = "aclk", "susp_clk", "phyclk", "pipe_pclk";
    > #address-cells = <1>;
    > #size-cells = <1>;
    > - ranges;
    > + ranges = <0x0 0x15a00000 0x10000>;
    > status = "disabled";
    >
    > - usbhost_dwc3: usb@15a00000 {
    > + usbhost_dwc3: usb@0 {
    > compatible = "snps,dwc3";
    > clocks = <&cmu_fsys CLK_SCLK_USBHOST30>,
    > <&cmu_fsys CLK_ACLK_USBHOST30>,
    > <&cmu_fsys CLK_SCLK_USBHOST30>;
    > clock-names = "ref", "bus_early", "suspend";
    > - reg = <0x15a00000 0x10000>;
    > + reg = <0x0 0x10000>;
    > interrupts = <GIC_SPI 244 IRQ_TYPE_LEVEL_HIGH>;
    > phys = <&usbhost30_phy 0>, <&usbhost30_phy 1>;
    > phy-names = "usb2-phy", "usb3-phy";

    Best regards
    --
    Marek Szyprowski, PhD
    Samsung R&D Institute Poland

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