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SubjectRe: [PATCH RESEND v4] perf/core: Fix reentry problem in perf_output_read_group
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Hello,

On 2022/9/5 9:25, Yang Jihong wrote:
> On Fri, Sep 02, 2022 at 04:29:18PM +0800, Yang Jihong wrote:
> > perf_output_read_group may respond to IPI request of other cores and
> > invoke __perf_install_in_context function. As a result, hwc
> configuration is modified.
> > causing inconsistency and unexpected consequences.
> >
> > Interrupts are not disabled when perf_output_read_group reads PMU
> counter.
> > In this case, IPI request may be received from other cores.
> > As a result, PMU configuration is modified and an error occurs when
> > reading PMU counter:
> >
> >                    CPU0                                         CPU1
> > __se_sys_perf_event_open
> > perf_install_in_context
> > perf_output_read_group smp_call_function_single
> >   for_each_sibling_event(sub, leader) { generic_exec_single
> >     if ((sub != event) && remote_function
> >         (sub->state == PERF_EVENT_STATE_ACTIVE))                    |
> > <enter IPI handler: __perf_install_in_context>   <----RAISE IPI-----+
> > __perf_install_in_context
> >   ctx_resched
> >     event_sched_out
> >       armpmu_del
> >         ...
> >         hwc->idx = -1; // event->hwc.idx is set to -1 ...
> > <exit IPI>
> >             sub->pmu->read(sub);
> >               armpmu_read
> >                 armv8pmu_read_counter
> >                   armv8pmu_read_hw_counter
> >                     int idx = event->hw.idx; // idx = -1
> >                     u64 val = armv8pmu_read_evcntr(idx);
> >                       u32 counter = ARMV8_IDX_TO_COUNTER(idx); //
> invalid counter = 30
> >                       read_pmevcntrn(counter) // undefined instruction
> >
> > Signed-off-by: Yang Jihong <yangjihong1@huawei.com>
> > ---
>
> Right; thanks for reminding me. I had hoped you'd pick up and test the
> extra assertion some, but I'll just do that on top.
> .
OK, if you want me to do assertion testing on any scenarios,
please send me the patch.

Thanks,
Yang

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