Messages in this thread | | | Date | Wed, 28 Sep 2022 10:56:55 +0200 | From | "Arnd Bergmann" <> | Subject | Re: [mtd:nand/next 11/31] drivers/mtd/nand/raw/cadence-nand-controller.c:1893:4: error: implicit declaration of function 'ioread64_rep' is invalid in C99 |
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On Wed, Sep 28, 2022, at 10:41 AM, Valentin Korenblit wrote: > On 9/27/22 22:02, Arnd Bergmann wrote: >> On Tue, Sep 27, 2022, at 4:56 PM, Valentin Korenblit wrote: >>>>> But in the mean time I am only half satisfied, because we plan to do >>>>> twice more accesses than needed _just_ because of a the COMPILE_TEST >>>>> constraint. >> >> It's also possible you have to read from the second word first, >> like >> >> u32 *buf; >> do { >> buf[1] = __raw_readl(reg + 4); >> buf[0] = __raw_readl(reg); >> buf += 2; >> } while (buf < end);
> > Same result with pairs of readl at OFF0 and when reading at OFF1 first too, > I still see sdma_err. I've just opened a case to Cadence to see if there > is any workaround for this or if it is just not possible.
I think this just means that the access has to be done with the exact width that is configured, and you cannot implement the access on 32-bit architectures. The only possibility is that you can reconfigure the nand controller to 32-bit mode at runtime, which is what Cadence should be able to tell you.
Arnd
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