Messages in this thread | | | Date | Thu, 22 Sep 2022 14:54:06 +0200 | Subject | Re: [PATCH] dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names | From | Krzysztof Kozlowski <> |
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On 16/09/2022 15:31, Jean-Philippe Brucker wrote: > The QEMU devicetree uses a different order for SMMUv3 interrupt names, > and there isn't a good reason for enforcing a specific order. Since all > interrupt lines are optional, operating systems should not expect a > fixed interrupt array layout; they should instead match each interrupt > to its name individually. Besides, as a result of commit e4783856a2e8 > ("dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional"), "cmdq-sync" > and "priq" are already permutable. Relax the interrupt-names array > entirely by allowing any permutation, incidentally making the schema > more readable. > > Note that dt-validate won't allow duplicate names here so we don't need > to specify maxItems or add additional checks, it's quite neat.
Nice explanation, much appriecated!
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards, Krzysztof
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