Messages in this thread | | | Date | Thu, 1 Sep 2022 14:08:23 +0200 | From | Andrew Lunn <> | Subject | Re: [PATCH 2/2] net: ethernet: stmicro: stmmac: dwmac-rk: Add rv1126 support |
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> > On Mon, Aug 29, 2022 at 06:50:42AM +0000, Anand Moon wrote: > > > Rockchip RV1126 has GMAC 10/100/1000M ethernet controller > > > via RGMII and RMII interfaces are configured via M0 and M1 pinmux. > > > > > > This patch adds rv1126 support by adding delay lines of M0 and M1 > > > simultaneously. > > > > What does 'delay lines' mean with respect to RGMII? > > > > The RGMII signals need a 2ns delay between the clock and the data > > lines. There are three places this can happen: > > > > 1) In the PHY > > 2) Extra long lines on the PCB > > 3) In the MAC > > > > Generally, 1) is used, and controlled via phy-mode. A value of > > PHY_INTERFACE_MODE_RGMII_ID passed to the PHY driver means it will add > > these delays. > > > > You don't want both the MAC and the PHY adding delays. > > > These are set to enable MAC transmit clock delay set for Tx and Rx for > iomux group.
Which does not answer my question. Is this the same as, or different to, the 2ns delay required by RGMII?
Andrew
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