Messages in this thread | | | Date | Fri, 12 Aug 2022 11:32:59 +0100 | Subject | Re: [PATCH] PCI: mvebu: Fix endianity when accessing pci emul bridge members | From | Robin Murphy <> |
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On 2022-08-12 10:40, Pali Rohár wrote: > PCI emul bridge members iolimitupper, iobaseupper, memlimit and membase are > of type __le16, so correctly access these members via le16_to_cpu() macros. > > Fixes: 4ded69473adb ("PCI: mvebu: Propagate errors when updating PCI_IO_BASE and PCI_MEM_BASE registers") > Reported-by: kernel test robot <lkp@intel.com> > Signed-off-by: Pali Rohár <pali@kernel.org> > --- > drivers/pci/controller/pci-mvebu.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c > index c1ffdb06c971..00ea0836b81a 100644 > --- a/drivers/pci/controller/pci-mvebu.c > +++ b/drivers/pci/controller/pci-mvebu.c > @@ -523,7 +523,7 @@ static int mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port) > > /* Are the new iobase/iolimit values invalid? */ > if (conf->iolimit < conf->iobase || > - conf->iolimitupper < conf->iobaseupper) > + le16_to_cpu(conf->iolimitupper) < le16_to_cpu(conf->iobaseupper)) > return mvebu_pcie_set_window(port, port->io_target, port->io_attr, > &desired, &port->iowin); > > @@ -535,10 +535,10 @@ static int mvebu_pcie_handle_iobase_change(struct mvebu_pcie_port *port) > * is the CPU address. > */ > desired.remap = ((conf->iobase & 0xF0) << 8) | > - (conf->iobaseupper << 16); > + le16_to_cpu(conf->iobaseupper << 16);
This will always give 0, even when natively LE.
> desired.base = port->pcie->io.start + desired.remap; > desired.size = ((0xFFF | ((conf->iolimit & 0xF0) << 8) | > - (conf->iolimitupper << 16)) - > + le16_to_cpu(conf->iolimitupper << 16)) -
Similarly here.
Robin.
> desired.remap) + > 1; > > @@ -552,7 +552,7 @@ static int mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) > struct pci_bridge_emul_conf *conf = &port->bridge.conf; > > /* Are the new membase/memlimit values invalid? */ > - if (conf->memlimit < conf->membase) > + if (le16_to_cpu(conf->memlimit) < le16_to_cpu(conf->membase)) > return mvebu_pcie_set_window(port, port->mem_target, port->mem_attr, > &desired, &port->memwin); > > @@ -562,8 +562,8 @@ static int mvebu_pcie_handle_membase_change(struct mvebu_pcie_port *port) > * window to setup, according to the PCI-to-PCI bridge > * specifications. > */ > - desired.base = ((conf->membase & 0xFFF0) << 16); > - desired.size = (((conf->memlimit & 0xFFF0) << 16) | 0xFFFFF) - > + desired.base = ((le16_to_cpu(conf->membase) & 0xFFF0) << 16); > + desired.size = (((le16_to_cpu(conf->memlimit) & 0xFFF0) << 16) | 0xFFFFF) - > desired.base + 1; > > return mvebu_pcie_set_window(port, port->mem_target, port->mem_attr, &desired,
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