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SubjectRe: [PATCH v7 0/5] Renesas RZ/G2L IRQC support
Hi Marc,

On Wed, Jul 6, 2022 at 8:02 AM Marc Zyngier <maz@kernel.org> wrote:
>
> On Sun, 03 Jul 2022 20:40:15 +0100,
> Lad Prabhakar <prabhakar.csengg@gmail.com> wrote:
> >
> > Hi All,
> >
> > The RZ/G2L Interrupt Controller is a front-end for the GIC found on
> > Renesas RZ/G2L SoC's with below pins:
> > - IRQ sense select for 8 external interrupts, mapped to 8 GIC SPI
> > interrupts
> > - GPIO pins used as external interrupt input pins out of GPIOINT0-122 a
> > maximum of only 32 can be mapped to 32 GIC SPI interrupts,
> > - NMI edge select.
> >
> > _____________
> > | GIC |
> > | ________ |
> > ____________ | | | |
> > NMI --------------------------------->| | SPI0-479 | | GIC-600| |
> > _______ | |------------>| | |
> > | | | | PPI16-31 | | | |
> > | | IRQ0-IRQ7 | IRQC |------------>| | |
> > P0_P48_4 --->| GPIO |---------------->| | | |________| |
> > | |GPIOINT0-122 | | | |
> > | |---------------->| TINT0-31 | | |
> > |______| |__________| |____________|
> >
> > The proposed patches add hierarchical IRQ domain, one in IRQC driver and
> > another in pinctrl driver. Upon interrupt requests map the interrupt to
> > GIC. Out of GPIOINT0-122 only 32 can be mapped to GIC SPI, this mapping is
> > handled by the pinctrl and IRQC driver.
> >
> > Cheers,
> > Prabhakar
> >
> > v6->v7:
> > * Used devm_reset_control_get_exclusive() instead of
> > devm_reset_control_get_exclusive_by_index()
> > * Included RB tag from Linus for patch 5/5
> > * Switched to newer version of populate_parent_alloc_arg() (patch depends
> > on https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/
> > patch/?id=178b7e21459e9a7e2a2c369711ef0cc9b1cfbcd7)
>
> Please add this patch as part of the series.
>
Sure will do.

Cheers,
Prabhakar

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