Messages in this thread | | | Date | Wed, 6 Jul 2022 17:25:24 +0530 | Subject | Re: [PATCH v2 2/3] dt-bindings: pci: QCOM Adding sc7280 aggre0, aggre1 clocks | From | Krishna Chaitanya Chundru <> |
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On 7/4/2022 1:54 PM, Krzysztof Kozlowski wrote: > On 01/07/2022 18:11, Krishna chaitanya chundru wrote: >> Adding aggre0 and aggre1 clock entries to PCIe node. >> >> Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> >> --- >> Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 6 ++++-- >> 1 file changed, 4 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> index 0b69b12..8f29bdd 100644 >> --- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml >> @@ -423,8 +423,8 @@ allOf: >> then: >> properties: >> clocks: >> - minItems: 11 >> - maxItems: 11 >> + minItems: 13 >> + maxItems: 13 >> clock-names: >> items: >> - const: pipe # PIPE clock >> @@ -437,6 +437,8 @@ allOf: >> - const: bus_slave # Slave AXI clock >> - const: slave_q2a # Slave Q2A clock >> - const: tbu # PCIe TBU clock >> + - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock >> + - const: aggre1 # Aggre NoC PCIe1 AXI clock > You ignored my comments from v1 - please don't. This is not accepted. > > Also, please do not send new versions of patchset as reply to some other > threads. It's extremely confusing to find it under something else. > > Best regards, > Krzysztof Hi
Krzysztof,
Sorry for confusion created which replying this patch.
The only comment I got from v1 from you is to run make dtbs_check.
I ran that command I found the errors and fixed them and I ran the make dtbs_check again before on v2 and made sure there are no errors.
Can you please tell me is there any steps I missed.
Thanks & Regards, Krishna Chaitanya.
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