Messages in this thread | | | Date | Wed, 27 Jul 2022 10:51:53 +0200 | Subject | Re: [PATCH 3/6] dt-bindings: riscv: Add Andes AX45MP core to the list | From | Krzysztof Kozlowski <> |
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On 26/07/2022 20:06, Lad Prabhakar wrote: > The Renesas RZ/Five microprocessor includes a RISC-V CPU Core (AX45MP > Single) from Andes. In preparation to add support for RZ/Five SoC add > the Andes AX45MP core to the list. >
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards, Krzysztof
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