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Subject[PATCH v2 6/7] iommu/exynos: Add SysMMU v7 register sets
Date
SysMMU v7 might have different register layouts (VM capable or non-VM
capable). Check which layout is implemented in current SysMMU module and
prepare the corresponding register table for futher usage.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
---
Changes in v2:
- (none) This patch is new and added in v2

drivers/iommu/exynos-iommu.c | 26 ++++++++++++++++++++++----
1 file changed, 22 insertions(+), 4 deletions(-)

diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 48681189ccf8..64bf3331064f 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -166,6 +166,8 @@ static u32 lv2ent_offset(sysmmu_iova_t iova)
enum {
REG_SET_V1,
REG_SET_V5,
+ REG_SET_V7_NON_VM,
+ REG_SET_V7_VM,
MAX_REG_SET
};

@@ -201,6 +203,16 @@ static const unsigned int sysmmu_regs[MAX_REG_SET][MAX_REG_IDX] = {
0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x20, 0x24,
0x60, 0x64,
},
+ /* SysMMU v7: Default register set (non-VM) */
+ {
+ 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x20, 0x24,
+ 0x60, 0x64,
+ },
+ /* SysMMU v7: VM capable register set */
+ {
+ 0x00, 0x04, 0x08, 0x800c, 0x8010, 0x8014, 0x8018, 0x8020,
+ 0x8024, 0x60, 0x64,
+ },
};

static struct device *dma_dev;
@@ -440,12 +452,18 @@ static void sysmmu_get_hw_info(struct sysmmu_drvdata *data)
__sysmmu_enable_clocks(data);

__sysmmu_get_version(data);
- if (MMU_MAJ_VER(data->version) >= 7 && __sysmmu_has_capa1(data))
- __sysmmu_get_vcr(data);
- if (MMU_MAJ_VER(data->version) < 5)
+ if (MMU_MAJ_VER(data->version) < 5) {
data->regs = sysmmu_regs[REG_SET_V1];
- else
+ } else if (MMU_MAJ_VER(data->version) < 7) {
data->regs = sysmmu_regs[REG_SET_V5];
+ } else {
+ if (__sysmmu_has_capa1(data))
+ __sysmmu_get_vcr(data);
+ if (data->has_vcr)
+ data->regs = sysmmu_regs[REG_SET_V7_VM];
+ else
+ data->regs = sysmmu_regs[REG_SET_V7_NON_VM];
+ }

__sysmmu_disable_clocks(data);
}
--
2.30.2
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