Messages in this thread | | | Date | Thu, 26 May 2022 16:51:18 +0100 | From | Mark Brown <> | Subject | Re: [PATCH v1] spi: imx: mx51-ecspi: fix clk polarity and phase configuration for CS > 4 |
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On Mon, May 23, 2022 at 09:31:43AM +0200, Oleksij Rempel wrote: > Fix support for boards with more then 4 chip select lines. Other wise if > CS > 4 is used, we will write trash to the clk configuration register.
This doesn't apply against current code, please check and resend. [unhandled content-type:application/pgp-signature] | |